45 percent less power, 23 percent faster, 16 percent smaller
In late June 2022, Samsung became the first chipmaker to bring gate-all-around transistor technology to mass production, crossing a threshold that engineers have long anticipated as the natural successor to a decade of fin-shaped design. The achievement places Samsung ahead of TSMC in architectural terms, though the deeper question — whether early leadership translates into reliable, scalable output — remains unanswered. Humanity's hunger for smaller, faster, cooler-running devices has always pushed the boundaries of what matter itself can be made to do, and this moment is another chapter in that restless negotiation between ambition and physics.
- Samsung has crossed into 3nm gate-all-around production first, putting immediate competitive pressure on TSMC's long-standing dominance of the advanced foundry market.
- Yield rates tell a sobering counter-story: only 10–20% of chips are coming off the line without defects, compared to 35% at the 4nm node, threatening cost and availability.
- Qualcomm has quietly reserved 3nm capacity at Samsung as a hedge — a signal that the industry is watching closely but not yet ready to commit.
- Samsung is already engineering a second-generation 3nm process with even steeper gains, racing to prove that its early lead is a foundation, not just a headline.
Samsung announced in late June 2022 that it had begun mass-producing chips using a 3-nanometer process built on gate-all-around (GAA) transistor architecture — making it the first company to bring this design to commercial scale. The move puts direct pressure on TSMC, which has long held the foundry industry's top position.
The technology marks a genuine structural shift. Where the past decade relied on fin-shaped FinFET transistors, GAA wraps the gate material entirely around the transistor channel using nanosheets, giving engineers greater flexibility and efficiency. Against Samsung's own 5nm process, the new node delivers 45% lower power consumption, 23% faster performance, and 16% less physical area — improvements that ripple outward into longer battery life, cooler data centers, and denser chips.
Dr. Siyoung Choi, who leads Samsung's foundry division, placed the milestone within a longer arc of firsts — high-k metal gate, FinFET, extreme ultraviolet lithography — and confirmed that a second-generation 3nm process is already in development, targeting 50% power reduction, 30% performance gains, and 35% area savings.
The complication is yield. Current reports suggest only 10–20% of chips are emerging defect-free, a steep drop from the 35% achieved at 4nm. Fewer working chips per wafer means higher costs and constrained supply — a gap Samsung must close to turn its architectural lead into a business advantage.
Qualcomm has hedged accordingly, reserving 3nm capacity at Samsung as insurance should TSMC face its own yield difficulties when its competing process launches later in 2022. Apple, meanwhile, is expected to receive priority access to TSMC's 3nm output for future Mac chips. Whether Samsung can tighten its yields while holding its performance edge will determine whether this announcement reshapes the foundry landscape or remains a milestone without a market.
Samsung has begun manufacturing chips using a new 3-nanometer process built on gate-all-around technology, marking a significant moment in the race for advanced semiconductor production. The company announced the milestone in late June 2022, positioning itself as the first to bring this particular architecture to mass production—a claim that puts pressure on Taiwan Semiconductor Manufacturing Company, which has dominated the foundry business for years.
The technology itself represents a meaningful step forward in how transistors are constructed. Rather than using the fin-shaped structures that have defined chip design for the past decade, Samsung's approach wraps the gate material completely around the transistor channel, using nanosheets instead of nanowires. This gives engineers more flexibility in how they arrange the transistors on a chip, which translates into tangible benefits: compared to Samsung's own 5-nanometer process, the new 3nm technology consumes 45 percent less power, runs 23 percent faster, and uses 16 percent less physical space. Those numbers matter because power consumption directly affects battery life in phones and heat management in data centers, while performance gains mean faster processing, and smaller area means more transistors fit on the same piece of silicon.
Dr. Siyoung Choi, who leads Samsung's foundry business, framed the announcement as part of a longer pattern of innovation. Samsung has a track record of being first with major manufacturing breakthroughs—it pioneered high-k metal gate technology, then FinFET, then extreme ultraviolet lithography. The 3nm process with gate-all-around transistors represents the next step in that progression. The company is already working on a second generation of the same process, which would push the improvements even further: 50 percent power reduction, 30 percent performance gains, and 35 percent less area.
But there is a complication. Yield rates—the percentage of chips that come off the production line without defects—tell a different story. Reports suggest Samsung's 3nm process is yielding only between 10 and 20 percent of usable chips, a sharp drop from the 35 percent yield the company achieved with its 4nm process. That gap matters enormously because it affects cost and availability. A lower yield means fewer working chips per wafer, which drives up the price per unit and limits how many products can be made.
Qualcomm, the major smartphone chip designer, has hedged its bets. The company has made reservations for Samsung's 3nm capacity, apparently as insurance in case TSMC encounters its own yield problems when it begins mass production of its competing 3nm process later in 2022. If Samsung can improve its yields and prove reliability, Qualcomm might shift orders away from TSMC for future Snapdragon processors. Apple, meanwhile, is expected to get priority access to TSMC's 3nm chips for its next-generation Mac processors. The real test for Samsung will be whether it can close the yield gap while maintaining the performance advantages it has already demonstrated. If it does, the foundry landscape could shift.
Citações Notáveis
Samsung seeks to continue leadership with the world's first 3nm process with gate-all-around technology, pursuing active innovation in competitive development.— Dr. Siyoung Choi, President and Head of Foundry Business at Samsung Electronics
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Why does Samsung announcing this process matter right now? Isn't chip manufacturing always advancing?
The timing matters because TSMC has owned this space for so long that Samsung getting there first—even by a few months—signals the competition is real again. It's not just incremental progress; it's a different architectural approach that actually works at scale.
But you mentioned the yield problem. If only 10 to 20 percent of chips work, how is that a win?
It's a win on paper but a problem in practice. Samsung proved the technology works and delivers the performance gains they promised. But you can't sell chips that don't work. The next year or two will determine whether they can fix the yields without losing the performance advantage.
What does Qualcomm's reservation actually mean? Are they switching away from TSMC?
Not yet. It's a safety valve. Qualcomm is saying to Samsung: if TSMC stumbles, we're ready to work with you. It's also a signal to TSMC that they have competition. Right now, TSMC is still the default choice because they have better yields and proven reliability.
So this is really about whether Samsung can execute?
Exactly. The hard part isn't inventing the technology—it's making millions of chips that all work the same way, consistently, at a price that makes sense. Samsung has the architecture right. Now they have to prove they can manufacture it reliably.